Nagano, Japan

Yu Karasawa

This inventor holds 2 USPTO granted patents. Top assignee: Shinko Electric Industries Co., Ltd.. Active years: 2020-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yu Karasawa. Retrieved from https://idiyas.com/inventor/yu-karasawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.7

ph-index = 1


Company Filing History:


Years Active: 2020-2025

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2 patents (USPTO):Explore Patents

Title: Yu Karasawa: Wiring Substrate and Board Innovations.

Introduction

Yu Karasawa is an inventor based in Nagano, Japan, associated with Shinko Electric Industries Co., Ltd. His patent work focuses on wiring boards and substrates, including structures for electrical connections and manufacturing.

Latest Patents

Karasawa is named on 2 patents.

“Wiring board assembly, wiring board, and wiring board manufacturing method” describes a wiring structure covered by an insulating layer. A slit in the layer exposes a selected region of the wiring structure, and the edge of the outermost insulating layer follows a wave-like path along the slit.

“Wiring substrate and electronic device” describes a substrate with a wiring layer and a solder resist layer. A circular opening in the resist exposes part of the wiring layer, while a support covers another portion within the opening. A cylindrical connection pin is bonded to an exposed connection pad.

Career Highlights

Karasawa’s listed inventions address wiring-board design and electrical interconnection. The patent descriptions highlight features intended to shape exposed regions and support connections between substrate components.

Collaborations

Karasawa’s listed coworkers include Hiroaki Taniguchi and Sachiko Oda. His company, Shinko Electric Industries Co., Ltd., is associated with his patent work.

Conclusion

Yu Karasawa’s two listed patents reflect his contributions to wiring-board and substrate technologies through innovations in insulating-layer geometry and connection-pin bonding.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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