Santa Clara, CA, United States of America

Yoshihumi Tahara

This inventor holds 1 USPTO granted patent. Top assignee: Adv Antest Corporation. Active years: 2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yoshihumi Tahara. Retrieved from https://idiyas.com/inventor/yoshihumi-tahara

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 7.0

ph-index = 1

Forward Citations = 9(Granted Patents)


Company Filing History:


Years Active: 2012

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1 patent (USPTO):Explore Patents

Title: Innovations of Yoshihumi Tahara in Semiconductor Testing

Introduction

Yoshihumi Tahara is a notable inventor based in Santa Clara, CA, who has made significant contributions to the field of semiconductor testing. His work primarily focuses on developing methods and structures that enhance the efficiency and effectiveness of test programs for semiconductor integrated circuits.

Latest Patents

Yoshihumi holds a patent for a "Method and structure to develop a test program for semiconductor integrated circuits." This invention describes a test program development for a semiconductor test system, such as automated test equipment (ATE), using object-oriented constructs. The method provides a comprehensive approach to describing test system resources, configurations, sequences, plans, conditions, patterns, and timing information through general-purpose object-oriented constructs, such as C++ objects and classes. The modularity of this program development is particularly suitable for creating test programs for an open architecture semiconductor test system. He has 1 patent to his name.

Career Highlights

Yoshihumi has built a successful career at Adv Antest Corporation, where he has applied his innovative ideas to improve semiconductor testing processes. His expertise in object-oriented programming has allowed him to contribute to the advancement of testing methodologies in the semiconductor industry.

Collaborations

Throughout his career, Yoshihumi has collaborated with talented professionals, including Toshiaki Adachi and Ramachandran Krishnaswamy. These collaborations have further enriched his work and contributed to the development of cutting-edge testing solutions.

Conclusion

Yoshihumi Tahara's contributions to semiconductor testing through his innovative patent demonstrate his commitment to advancing technology in this critical field. His work continues to influence the development of efficient testing methodologies for semiconductor integrated circuits.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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