For the Inventor, By the Inventor

Enter inventor name

San Jose, CA, United States of America

Yoon J Huh

This inventor holds 3 USPTO granted patents. Top assignees: Lsi Logic Corporation, Other. Active years: 2005-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yoon J Huh. Retrieved from https://idiyas.com/inventor/yoon-j-huh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 3

% Patents Active = 33.3

Average Co-Inventor Count = 1.8

ph-index = 3

Forward Citations = 52(Granted Patents)

Location History:

Milpitas, CA (US) (2006)
San Jose, CA (US) (2005 - 2008)

Company Filing History:

Lsi Logic Corporation

1 out of 834,453

Other

patents

Years Active: 2005-2008

Loading Chart...

3 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7453676 - RC-triggered ESD power clamp circuit and method for providing ESD protection (2008-11-18),

2. 7119405 - Implantation method to improve ESD robustness of thick gate-oxide grounded-gate NMOSFET's in deep-submicron CMOS technologies (2006-10-10),

3. 6979869 - Substrate-biased I/O and power ESD protection circuits in deep-submicron twin-well process (2005-12-27),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

Loading…