Yew Fatt Kok

Title: Yew Fatt Kok: Innovator in Clock Signal Networks

Introduction

Yew Fatt Kok is a notable inventor based in Penang, Malaysia. He has made significant contributions to the field of structured ASIC devices, holding a total of 3 patents. His work focuses on improving clock distribution circuitry, which is essential for the performance of various electronic devices.

Latest Patents

One of Yew Fatt Kok's latest patents is titled "Clock signal networks for structured ASIC devices." This invention involves clock distribution circuitry that includes both deterministic and configurable portions. The deterministic portion utilizes a predetermined arrangement of conductor segments and buffers to effectively distribute a clock signal to multiple predetermined locations on the device. From each of these locations, the associated configurable portion of the circuitry ensures that the clock signal reaches any clock utilization circuitry that requires it within a designated area of the structured ASIC.

Career Highlights

Yew Fatt Kok is currently employed at Altera Corporation, a company known for its innovative solutions in the field of programmable logic devices. His expertise in clock signal networks has positioned him as a valuable asset to the organization.

Collaborations

Throughout his career, Yew Fatt Kok has collaborated with talented individuals such as Chooi Pei Lim and Joo Ming Too. These collaborations have further enhanced his work and contributed to the development of advanced technologies in the industry.

Conclusion

Yew Fatt Kok's contributions to clock signal networks for structured ASIC devices demonstrate his innovative spirit and technical expertise. His patents reflect a commitment to advancing technology in the field, making him a significant figure in the world of inventions.