YenLung Li

This inventor holds 25 USPTO granted patents and 1 published patent application, primarily in Non-Volatile Memory. Top assignees: Sandisk Technologies Inc., Western Digital Technologies, Inc.. Active years: 2016-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: YenLung Li. Retrieved from https://idiyas.com/inventor/yenlung-li

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 25 (Patent Applications = 1)

% Patents Active = 96.0

Average Co-Inventor Count = 3.3

ph-index = 5

Forward Citations = 97(Granted Patents)

Company Filing History:

22 out of 4,955

Sandisk Technologies Inc.

patents

3 out of 5,429

Western Digital Technologies, Inc.

patents

Years Active: 2016-2026

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Areas of Expertise:

Data Compression

Soft Bit Data

NAND Structure

Data Transfer Protocol

Memory Device

Serializer

Deserializer

Latency Reduction

Data Latches

Power On Read

Asynchronous FIFO

25 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12518845 - Built-in self-test circuitry for data in path for non-volatile memory with multiple test clock speeds for multiple test modes (2026-01-06),

2. 12057188 - Use of data latches for plane level compression of soft bit data in non-volatile memories (2024-08-06),

3. 12009049 - Non-volatile memory with shared data transfer latches (2024-06-11),

4. 11990185 - Dynamic word line reconfiguration for NAND structure (2024-05-21),

5. 11971829 - On-the-fly compression scheme for soft bit data in non-volatile memory (2024-04-30),

6. 11971826 - Architecture and data path options for compression of soft bit data in non-volatile memories (2024-04-30),

7. 11907545 - On-the-fly multiplexing scheme for compressed soft bit data in non-volatile memories (2024-02-20),

8. 11901019 - Use of data latches for compression of soft bit data in non-volatile memories (2024-02-13),

9. 11776589 - Vertical compression scheme for compressed soft bit data in non-volatile memories with data latch groups (2023-10-03),

10. 11755211 - Overhead reduction in data transfer protocol for NAND memory (2023-09-12),

11. 11735288 - Non-volatile storage system with power on read timing reduction (2023-08-22),

12. 11487446 - Overhead reduction in data transfer protocol for NAND memory (2022-11-01),

13. 11386961 - Centralized fixed rate serializer and deserializer for bad column management in non-volatile memory (2022-07-12),

14. 11380417 - Circuit to reduce gating overall system performance (2022-07-05),

15. 11152079 - Circuits and methods for reliable replacement of bad columns in a memory device (2021-10-19),

Title: The Innovative Journey of YenLung Li

Introduction: YenLung Li, a talented inventor based in San Jose, CA, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents: YenLung Li holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his expertise in cutting-edge technologies.

Career Highlights: With a background in computer science and engineering, YenLung Li has worked for top tech companies in Silicon Valley, where he honed his skills and developed revolutionary solutions.

Collaborations: Throughout his career, YenLung Li has collaborated with leading researchers and engineers, fostering a culture of innovation and pushing the boundaries of what is possible in the tech industry.

Conclusion: YenLung Li's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and shape the future of technology.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: