Hsinchu, Taiwan

Yen-Pin Hsu

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yen-Pin Hsu. Retrieved from https://idiyas.com/inventor/yen-pin-hsu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Yen-Pin Hsu: Innovator in Semiconductor Technology

Introduction

Yen-Pin Hsu is a talented inventor based in Hsinchu, Taiwan. She has made significant contributions to the field of semiconductor technology. Her innovative ideas focus on enhancing the performance and reliability of semiconductor devices.

Latest Patent Applications

Yen-Pin Hsu's notable patent application is titled "ETCHING-DAMAGE-FREE INTERMETAL DIELECTRIC LAYER WITH THERMAL DISSIPATION FEATURE." This application describes a semiconductor device that includes a substrate and a dielectric layer disposed over the substrate. The interconnect structure extends through the dielectric layer, which comprises a low-k dielectric material made of silicon carbonitride. This material has a carbon content ranging from about 30 atomic % to about 45 atomic %. Additionally, the semiconductor device features a thermal dissipation component that is strategically placed to be spaced apart from the interconnect structure.

Conclusion

Yen-Pin Hsu is an emerging inventor whose work in semiconductor technology showcases her innovative spirit and dedication to advancing the field. Her contributions, particularly in developing etching-damage-free dielectric layers, highlight her potential to impact the industry significantly.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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