Hsinchu, Taiwan

Yeh-Jye Wang

This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yeh-Jye Wang. Retrieved from https://idiyas.com/inventor/yeh-jye-wang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 8(Granted Patents)


Company Filing History:


Years Active: 2008

Loading Chart...
1 patent (USPTO):Explore Patents

Title: Yeh-Jye Wang: Innovator in Die Placement Optimization

Introduction

Yeh-Jye Wang is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor manufacturing, particularly in optimizing die placement on wafers. His innovative approach has the potential to enhance the efficiency of semiconductor production.

Latest Patents

Yeh-Jye Wang holds a patent titled "Methods for optimizing die placement." This patent describes a method that involves arranging a plurality of fields on a wafer with an alignment mark. The process includes inserting dummies between the arranged fields and the alignment mark, as well as adjacent to the wafer edge. The method determines the total number of dies manufacturable at different positions on the wafer and compares these to identify optimal die placement positions. This innovative technique aims to maximize the number of manufacturable dies, thereby improving production efficiency.

Career Highlights

Yeh-Jye Wang is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work focuses on enhancing manufacturing processes through innovative methods and technologies. With a patent portfolio that includes 1 patent, he has established himself as a key contributor to advancements in semiconductor technology.

Collaborations

Yeh-Jye Wang has collaborated with notable colleagues, including Hong-Hsing Chou and Jen-Hsin Wang. These collaborations have fostered a productive environment for innovation and development within the semiconductor field.

Conclusion

Yeh-Jye Wang's contributions to die placement optimization reflect his commitment to advancing semiconductor manufacturing. His innovative methods have the potential to significantly impact the efficiency of the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…