Gunma, Japan

Yasuo Tokunaga

This inventor holds 2 USPTO granted patents. Top assignee: Adv Antest Corporation. Active years: 2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasuo Tokunaga. Retrieved from https://idiyas.com/inventor/yasuo-tokunaga

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2014

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2 patents (USPTO):Explore Patents

Title: Innovations by Yasuo Tokunaga

Introduction

Yasuo Tokunaga is a notable inventor based in Gunma, Japan. He has made significant contributions to the field of semiconductor testing, holding a total of 2 patents. His work focuses on enhancing the efficiency and effectiveness of testing systems for semiconductor devices.

Latest Patents

Tokunaga's latest patents include a test wafer unit and a test system. The test wafer unit is designed to test multiple devices under test formed on a wafer. It comprises several test circuits on the same semiconductor wafer, with different functions provided for each device under test. This innovative design allows for the selection of the appropriate test circuit based on the testing content, enabling a variety of tests to be performed efficiently. The test system complements this by testing multiple semiconductor chips on a wafer, utilizing a nonvolatile and rewritable pattern memory for storing test data. This system can write the same test data to all test circuits in parallel, streamlining the testing process.

Career Highlights

Yasuo Tokunaga is currently employed at Adv Antest Corporation, where he continues to develop cutting-edge testing technologies. His expertise in semiconductor testing has positioned him as a key player in the industry.

Collaborations

One of his notable coworkers is Yoshio Komoto, with whom he collaborates on various projects related to semiconductor testing.

Conclusion

Yasuo Tokunaga's contributions to semiconductor testing through his innovative patents demonstrate his commitment to advancing technology in this field. His work continues to influence the efficiency of testing systems, making a significant impact on the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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