Yanfei Shen

Title: Yanfei Shen - Innovator in Circuit Layout Reconstruction

Introduction

Yanfei Shen is a notable inventor based in San Jose, California. He has made significant contributions to the field of circuit design and layout reconstruction. His innovative approach has led to the development of a unique method that enhances graphical display capabilities in circuit layouts.

Latest Patents

Yanfei Shen holds a patent for a "Method of reconstruction of post-layout design for graphical display." This method involves reconstructing an emulated circuit layout by receiving a pre-layout circuit that includes various devices and nodes. The process generates a Detailed Standard Parasitic Format (DPSF) netlist that represents a post-layout circuit. This netlist includes instances of devices, nodes, and parasitic elements not present in the pre-layout circuit. The method identifies nodes associated with parasitic elements and updates the DPSF netlist accordingly. Finally, it constructs a graphical representation of the post-layout circuit for display.

Career Highlights

Yanfei Shen is currently employed at Cadence Design Systems, Inc., where he applies his expertise in circuit design. His work focuses on improving the efficiency and accuracy of circuit layouts, which is crucial for modern electronic devices. With a patent portfolio that includes 1 patent, he continues to push the boundaries of innovation in his field.

Collaborations

Some of Yanfei's coworkers include Qingyu Lin and Patrick O'Halloran. Their collaborative efforts contribute to the advancement of technology in circuit design and layout reconstruction.

Conclusion

Yanfei Shen's innovative methods in circuit layout reconstruction demonstrate his commitment to enhancing graphical display technologies. His contributions are valuable to the field and reflect the importance of innovation in electronic design.