Vestal, NY, United States of America

Xiaochuan Yuan

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2010.


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 15(Granted Patents)


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: Innovations in Low Power Circuit Testing by Xiaochuan Yuan

Introduction

Xiaochuan Yuan is an accomplished inventor based in Vestal, NY (US). He has made significant contributions to the field of integrated circuit design and testing, particularly focusing on low power circuits. His innovative approach has led to advancements that enhance the efficiency and effectiveness of circuit testing.

Latest Patents

Xiaochuan Yuan holds a patent for "Test generation for low power circuits." This invention provides a method and system for circuit design, simulation, and testing specifically aimed at integrated circuits intended to operate at low power. The patent outlines a process for mapping portions of a circuit, such as a power domain, to a test mode. This allows only the necessary portions of the circuit to be powered up during testing, conserving power and ensuring that the required conditions for fault observation are met.

Career Highlights

Xiaochuan Yuan is currently employed at Cadence Design Systems, Inc., where he continues to develop innovative solutions in integrated circuit design. His work has been instrumental in advancing the capabilities of low power circuit testing, making significant strides in the industry.

Collaborations

Some of Xiaochuan Yuan's notable coworkers include Vivek Chickermane and James Sage. Their collaborative efforts contribute to the ongoing success and innovation at Cadence Design Systems, Inc.

Conclusion

Xiaochuan Yuan's contributions to low power circuit testing exemplify the importance of innovation in the field of integrated circuits. His patent and work at Cadence Design Systems, Inc. highlight his commitment to advancing technology and improving testing methodologies.

Profile summary based on public USPTO records.
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