This inventor holds 1 USPTO granted patent. Top assignee: Synopsys, Inc.. Active years: 2011.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2011
Title: Innovations by Inventor Xiao-Ming Xiong
Introduction
Xiao-Ming Xiong is a notable inventor based in Fremont, CA (US). He has made significant contributions to the field of design planning, particularly in the area of design-for-test-aware hierarchical design planning. His innovative approach has implications for optimizing scan data in integrated circuit design.
Latest Patents
Xiong holds a patent for "Design-for-test-aware hierarchical design planning." This patent focuses on utilizing full-chip scan data during design planning to minimize top-level scan wires and scan feedthroughs. The invention allows for the reordering of scan cells using a modified cost function, which promotes connecting all scan cells in one plan group before crossing to another. The modified cost function considers various penalty parameters, including membership in a plan group, size of a plan group, and the location of endpoints in an ordered list. This innovation enables automatic updates of scan data at both block-level and top-level to reflect optimized scan chains.
Career Highlights
Xiao-Ming Xiong is currently employed at Synopsys, Inc., a leading company in electronic design automation. His work at Synopsys has allowed him to apply his expertise in design planning and contribute to advancements in the industry.
Collaborations
Xiong collaborates with talented professionals, including Hung-Chun Chien and Ben Mathew. These collaborations enhance the innovative environment at Synopsys and contribute to the development of cutting-edge technologies.
Conclusion
Xiao-Ming Xiong's contributions to design-for-test-aware hierarchical design planning exemplify the impact of innovation in the field of electronic design automation. His work continues to influence the optimization of design processes in the industry.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
