The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2011
Filed:
May. 19, 2008
Hung-chun Chien, Sunnyvale, CA (US);
Ben Mathew, Plano, TX (US);
Padmashree Takkars, Portland, OR (US);
Bang Liu, Shanghai, CN;
Chang-wei Tai, Los Altos, CA (US);
Xiao-ming Xiong, Fremont, CA (US);
Gary K. Yeap, Fremont, CA (US);
Hung-Chun Chien, Sunnyvale, CA (US);
Ben Mathew, Plano, TX (US);
Padmashree Takkars, Portland, OR (US);
Bang Liu, Shanghai, CN;
Chang-Wei Tai, Los Altos, CA (US);
Xiao-Ming Xiong, Fremont, CA (US);
Gary K. Yeap, Fremont, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
Full-chip scan data can be advantageously used during design planning to minimize top-level scan wires and scan feedthroughs. The scan cells can be reordered using a modified cost function to promote connecting all scan cells in one plan group before crossing to a scan cell in another plan group. The modified cost function can take into account penalty parameters. The penalty parameters can include at least one of: membership in a plan group or a top-level physical hierarchy, size of a plan group, FLOATING/ORDERED scan element in scan data, location of endpoints of an ORDERED list, location of endpoints of a macro, and membership in a plan group containing a STOP point. Scan data, at the block-level and at the top-level, can be automatically updated to reflect the plan groups and optimized scan chains.