Padmashree Takkars

Title: Innovations of Padmashree Takkars in Design Planning

Introduction

Padmashree Takkars is a notable inventor based in Portland, OR (US). She has made significant contributions to the field of design planning, particularly in the area of hierarchical design. Her innovative approach has led to the development of a unique patent that enhances the efficiency of full-chip scan data utilization.

Latest Patents

Padmashree holds a patent titled "Design-for-test-aware hierarchical design planning." This patent focuses on the advantageous use of full-chip scan data during design planning to minimize top-level scan wires and scan feedthroughs. The invention allows for the reordering of scan cells using a modified cost function, which promotes the connection of all scan cells within one plan group before transitioning to a scan cell in another group. The modified cost function incorporates penalty parameters, which can include factors such as membership in a plan group, size of a plan group, and the location of endpoints in an ordered list. Additionally, the scan data can be automatically updated to reflect the optimized scan chains at both the block-level and top-level.

Career Highlights

Padmashree Takkars is currently employed at Synopsys, Inc., where she continues to innovate and contribute to advancements in design technology. Her work has been instrumental in improving design planning processes, making them more efficient and effective.

Collaborations

Throughout her career, Padmashree has collaborated with talented individuals such as Hung-Chun Chien and Bang Liu. These collaborations have further enriched her work and contributed to the success of her projects.

Conclusion

Padmashree Takkars is a pioneering inventor whose contributions to design planning have made a significant impact in the field. Her innovative patent demonstrates her commitment to enhancing technology and improving design processes.