This inventor holds 2 USPTO granted patents. Top assignee: Lovoltech, Incorporated. Active years: 2004-2006.
Company Filing History:
Years Active: 2004-2006
Title: The Innovations of William Planey
Introduction
William Planey is an accomplished inventor based in Plano, TX (US). He has made significant contributions to the field of semiconductor technology. With a total of 2 patents to his name, his work has had a notable impact on the industry.
Latest Patents
One of his latest patents involves flip-chip packaging. This innovation features a semiconductor die mounted between an X-lead frame and a support structure without the need for bonding wires or straps. The design includes a power enhancement mode junction field effect transistor (JFET) die, which has a top surface defining a drain and a bottom surface with a first metalized region defining a source and a second metalized region defining a gate. The JFET die is positioned on a support structure, and an X-lead frame is bonded to this structure to ensure electrical contact with an external lead. Angular projections from the X-lead frame make contact with the top surface of the JFET, securing the die in place and forming electrical continuity between the JFET drain and the external lead. Additionally, a construction on the surface of the support structure is positioned directly under the source region of the JFET die, establishing electrical continuity between the JFET source and a second external lead.
Career Highlights
William Planey has been associated with Lovoltech, Incorporated, where he has furthered his research and development efforts. His work at Lovoltech has allowed him to explore innovative solutions in semiconductor technology.
Collaborations
(Section skipped due to space constraints.)
Conclusion
William Planey's contributions to semiconductor technology through his patents demonstrate his innovative spirit and technical expertise. His work continues to influence the industry and pave the way for future advancements.