The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 2004
Filed:
Aug. 09, 2002
William Planey, Plano, TX (US);
Lovoltech, Inc., Santa Clara, CA (US);
Abstract
A semiconductor die mounted between an X-lead frame and a support structure without bonding wires or straps. A power enhancement mode junction field effect transistor (JFET) die having a top surface defining a drain, and a bottom surface having a first metalized region defining a source and a second metalized region defining a gate, is positioned on a support structure. An X-lead frame is bonded to the support structure such that electrical contact is made with an external lead. Angular projections from the X-lead frame make contact with the top surface of the JFET, hold the die in place on the support structure, and form electrical continuity between the JFET drain and the external lead. A construction on the surface of the support structure is positioned directly under the source region on the bottom of the JFET die and forms electrical continuity between the JFET source and a second external lead.