Wei-Lun Jian

Title: Wei-Lun Jian and Semiconductor Manufacturing Innovation.

Introduction

Wei-Lun Jian is an inventor based in Hsinchu, Taiwan. His patent work addresses a semiconductor manufacturing challenge: reducing polysilicon peeling from the backside of a substrate.

Latest Patents

Jian is associated with 1 patent, titled “Substrate Backside Peeling Control.” The patent describes structures and methods designed to reduce backside polysilicon peeling. Its structure includes a substrate, a dielectric layer, a high-k layer, and a polysilicon layer. The layers are arranged so that the high-k layer’s innermost sidewall is within two millimeters of the dielectric layer’s innermost sidewall, while the polysilicon layer extends farther toward the substrate’s center than the dielectric layer.

Career Highlights

Jian works at Taiwan Semiconductor Manufacturing Company Limited (TSMC). His patent reflects work on controlling material layers and improving reliability in semiconductor fabrication.

Collaborations

Jian’s listed coworkers include Chia-Ming Tsai and Yu-Min Chang. Their inclusion indicates professional connections in the semiconductor technology field, though the available information does not specify their roles in this patent.

Conclusion

Wei-Lun Jian’s patent focuses on reducing backside polysilicon peeling through a carefully arranged substrate-layer structure, contributing to semiconductor manufacturing innovation.