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For the Inventor, By the Inventor

Redwood City, CA, United States of America

Warren E Cory

This inventor holds 22 USPTO granted patents, plus 2 CIPO patents, primarily in Integrated Circuit Design. Top assignees: Xilinx, Inc., Netlogic Microsystems, Inc. Active years: 2003-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Warren E Cory. Retrieved from https://idiyas.com/inventor/warren-e-cory

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 22

% Patents Active = 100.0


Average Co-Inventor Count = 1.8

ph-index = 12

Forward Citations = 311(Granted Patents)


Company Filing History:

goldMedal22 out of 5,108 
 
Xilinx, Inc.
 patents
silverMedal1 out of 456 
 
Netlogic Microsystems, Inc
 patents
where one patent can have more than one assignee

Years Active: 2003-2025

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Areas of Expertise:
Asynchronous Gearbox
Data Transfer Technique
Programmable Connector
Latency Measurement
Pipelined Decryption
Error Checking Parity
Channel Bonding
Transceiver Architecture
Multi-Gigabit Transceivers
Data Alignment
Variable Data Width
Clock Correction
22 patents (USPTO):Explore Patents
1. 12248761 - Deterministic reset mechanism for asynchronous gearbox FIFOs for predictable latency (2025-03-11),
2. 10623174 - Low latency data transfer technique for mesochronous divided clocks (2020-04-14),
3. 10528513 - Circuit for and method of providing a programmable connector of an integrated circuit device (2020-01-07),
4. 10038450 - Circuits for and methods of transmitting data in an integrated circuit (2018-07-31),
5. 10033523 - Circuit for and method of measuring latency in an integrated circuit (2018-07-24),
6. 8411703 - Method and apparatus for a reduced lane-lane skew, low-latency transmission system (2013-04-02),
7. 8301988 - Error checking parity and syndrome of a block of data with relocated parity bits (2012-10-30),
8. 8245102 - Error checking parity and syndrome of a block of data with relocated parity bits (2012-08-14),
9. 7913104 - Method and apparatus for receive channel data alignment with minimized latency variation (2011-03-22),
10. 7895509 - Error checking parity and syndrome of a block of data with relocated parity bits (2011-02-22),
11. 7623660 - Method and system for pipelined decryption (2009-11-24),
12. 7519747 - Variable latency buffer and method of operation (2009-04-14),
13. 7426678 - Error checking parity and syndrome of a block of data with relocated parity bits (2008-09-16),
14. 7382823 - Channel bonding control logic architecture (2008-06-03),
15. 7295639 - Distributed adaptive channel bonding control for improved tolerance of inter-channel skew (2007-11-13),

Title: Warren E Cory - Pioneering Inventor from Redwood City, CA

Introduction: Warren E Cory is a distinguished inventor based in Redwood City, California, known for his groundbreaking contributions to various fields.

Latest Patents: Warren E Cory holds several patents in the areas of technology, healthcare, and consumer products, showcasing his versatility and innovative spirit.

Career Highlights: Throughout his illustrious career, Warren E Cory has been recognized for his ability to transform ideas into tangible inventions that have had a significant impact on society. His dedication to innovation has led to the development of cutting-edge solutions that have improved the lives of many.

Collaborations: Warren E Cory has collaborated with leading companies, research institutions, and universities to bring his inventions to life. His ability to work across disciplines and industries has resulted in the creation of revolutionary products that have set new standards in the market.

Conclusion: Warren E Cory's passion for innovation and his relentless pursuit of excellence have established him as a trailblazer in the world of inventions. His remarkable contributions continue to inspire the next generation of inventors and shape the future of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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