W Alfred Graf, Iii

This inventor holds 20 USPTO granted patents, primarily in Programmable Logic Design. Top assignee: Cypress Semiconductor Corporation. Active years: 1997-2001.

IDiyas Innovation Intelligence. (2026). Inventor Profile: W Alfred Graf, Iii. Retrieved from https://idiyas.com/inventor/w-alfred-graf-iii

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 20

% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 8

Forward Citations = 186(Granted Patents)

Company Filing History:

20 out of 3,596

Cypress Semiconductor Corporation

patents

Years Active: 1997-2001

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Areas of Expertise:

Routability Maximization

Programmable Interconnect

Clock Synchronization

RAM-Based Devices

Pulse Discriminating

Asynchronous Logic

Data Conversion

Bi-Directional Signals

Contention Prevention

I/O Cell

Fast Clock Generator

Synchronous Logic

20 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 6243664 - Methods for maximizing routability in a programmable interconnect matrix having less than full connectability (2001-06-05),

2. 6185126 - Self-initializing RAM-based programmable device (2001-02-06),

3. 6084447 - Pulse discriminating clock synchronizer for logic derived clock signals (2000-07-04),

4. 5929676 - Asynchronous pulse discriminating synchronizing clock pulse generator (1999-07-27),

5. 5923868 - Methods for maximizing routability in a programmable interconnect matrix (1999-07-13),

6. 5923195 - Fast clock generator and clock synchronizer for logic derived clock (1999-07-13),

7. 5923194 - Fast clock generator and clock synchronizer for logic derived clock (1999-07-13),

8. 5920213 - Pulse discriminating clock synchronizer for logic derived clock signals (1999-07-06),

9. 5917350 - Asynchronous pulse discriminating synchronizing clock pulse generator (1999-06-29),

10. 5917337 - Programmable I/O cell with data conversion capability (1999-06-29),

11. 5912573 - Synchronizing clock pulse generator for logic derived clock signals for (1999-06-15),

12. 5912572 - Synchronizing clock pulse generator for logic derived clock signals with (1999-06-15),

13. 5869982 - Programmable I/O cell with data conversion capability (1999-02-09),

14. 5848066 - Methods for maximizing routability in a programmable interconnect matrix (1998-12-08),

15. 5811989 - Programmable I/O cell with data conversion capability (1998-09-22),

Title: Innovations by W Alfred Graf, III in Programmable Logic Devices

Introduction

W Alfred Graf, III is a prominent inventor based in Saratoga, CA, known for his significant contributions to the field of programmable logic devices. With a remarkable portfolio of 20 patents, Graf has developed innovative methods that enhance the functionality and efficiency of programmable interconnect matrices.

Latest Patents

Among his latest patents, Graf has introduced groundbreaking methods for maximizing routability in a programmable interconnect matrix with reduced connectivity. His patent details the design of an array of multiplexors, where each multiplexor has a width less than the number of input conductors. This setup ensures that input signals are shared strategically, improving the routing efficacy. Graf describes two embodiments for routing that enhance the matrix's performance: one involves swapping successfully routed input signals with blocked signals, while the other employs a predictive swapping technique to ensure optimal routing.

Additionally, Graf holds a patent for a self-initializing RAM-based programmable device. This innovative logic device features a RAM cell that powers up in a preferred state to deliver a predetermined logic signal. The design includes an interconnection element with two signal lines, which can be electrically coupled or not, based on the state of the interconnection. This configuration allows for flexible logic operations within programmable logic circuits.

Career Highlights

Graf is associated with Cypress Semiconductor Corporation, a leading technology company that specializes in advanced semiconductor solutions. His work there focuses on enhancing the capabilities of programmable logic devices which are critical in modern computing and electronic applications.

Collaborations

Throughout his career, W Alfred Graf, III has collaborated with notable coworkers, including Hagop A Nazarian and Stephen M Douglass. These partnerships have likely contributed to the innovative advancements and patent filings that have marked his career.

Conclusion

W Alfred Graf, III's inventive contributions in programmable logic represent a significant advancement in technology. His innovative patents not only showcase his expertise but also highlight his commitment to improving the efficiency and functionality of electronic systems. As the field of programmable logic continues to evolve, Graf's work stands as a testament to the importance of innovation in driving technological progress.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]