The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 1999

Filed:

Mar. 28, 1997
Applicant:
Inventor:

W Alfred Graf, III, Saratoga, CA (US);

Assignee:

Cypress Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327145 ; 327291 ;
Abstract

A programmable device includes means for generating an asynchronous logic derived clock signal from one or more of a number of input signals. Means for synchronizing the asynchronous logic derived clock signal to a reference clock signal are coupled to the means for generating. The means for synchronizing generate a synchronized logic derived clock signal from the asynchronous logic derived clock signal and the reference clock signal. The synchronized logic derived clock signal has a fixed duration logic HIGH interval for variable duration logic HIGH intervals of the input logic signals from which the synchronized logic derived clock signal is created.


Find Patent Forward Citations

Graf, III, W. (1999). Synchronizing clock pulse generator for logic derived clock signals for (U.S. Patent No. 5912573). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5912573

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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