Austin, TX, United States of America

Vu N Do

This inventor holds 1 USPTO granted patent. Top assignee: Silicon Laboratories Inc.. Active years: 2005.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Vu N Do. Retrieved from https://idiyas.com/inventor/vu-n-do

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2005

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1 patent (USPTO):Explore Patents

Title: Vu N Do: Inventor of an Integrated-Circuit Test Socket

Introduction

Vu N Do is an inventor associated with Silicon Laboratories Inc. and based in Austin, Texas. His patent work addresses test-socket design for integrated circuits, with a focus on incorporating an inductance loop into the socket.

Latest Patents

The provided information lists one patent for Vu N Do: “Test Socket with Integral Inductor and Method of Manufacturing Using Such a Test Socket.” The design includes two test leads that contact the integrated circuit’s external inductor terminals. An electrically conductive member extends between the leads, forming an inductance loop between those terminals. The patent also describes a method of manufacturing that uses the test socket. Do is credited with 1 patent in the information provided.

Career Highlights

Do’s listed invention connects his work at Silicon Laboratories Inc. with integrated-circuit testing. By integrating the conductive path into the test socket, the design provides a way to form an inductance loop through the socket’s contacts.

Collaborations

The provided information names David H. Griffin and Martin Joseph Gabriel III as Do’s coworkers. It does not specify their roles in the patent or whether they collaborated on the invention.

Conclusion

Vu N Do’s listed patent focuses on a test socket that forms an inductance loop between an integrated circuit’s external terminals, reflecting his contribution to integrated-circuit testing technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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