Fremont, CA, United States of America

Vijeta Prasad

This inventor holds 1 USPTO granted patent. Top assignee: Intel Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Vijeta Prasad. Retrieved from https://idiyas.com/inventor/vijeta-prasad

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Vijeta Prasad: Inventor in Chiplet Interconnect Technology.

Introduction

Vijeta Prasad is an inventor based in Fremont, California, whose patent work addresses communication across heterogeneous chiplets. His listed patent is assigned to Intel Corporation.

Latest Patents

Prasad is associated with 1 patent: “Inter-chiplet routing of transactions across multi-heterogeneous chiplets using hierarchical addressing.” The invention describes a system in which messages carry hierarchical destination identifiers: one portion identifies the destination chiplet, and another identifies the destination agent on that chiplet. A fabric adapter directs a message to a die-to-die bridge when its destination identifier points to another chiplet, enabling communications to be routed between agents across chiplets.

Career Highlights

The available information connects Prasad’s patent activity with Intel Corporation and highlights his work on chiplet routing and hierarchical addressing. These technologies are relevant to coordinating transactions among agents distributed across multiple chiplets.

Collaborations

Ramadass Nagarajan is identified as a coworker. The provided information does not specify her role in the patent or the nature of their collaboration.

Conclusion

Vijeta Prasad’s listed patent focuses on hierarchical addressing for routing transactions across heterogeneous chiplets, reflecting an effort to support communication in advanced chiplet-based systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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