Allen, TX, United States of America

Vijayakrishna J Vankayala

This inventor holds 45 USPTO granted patents and 10 published patent applications, primarily in Memory Device Technology. Top assignees: Micron Technology Incorporated, Lodestar Licensing Group LLC. Active years: 2015-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Vijayakrishna J Vankayala. Retrieved from https://idiyas.com/inventor/vijayakrishna-j-vankayala

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 45 

% Patents Active = 95.6

Average Co-Inventor Count = 1.7

ph-index = 4

Forward Citations = 65(Granted Patents)


Location History:

  • Plano, TX (US) (2016)
  • Allen, TX (US) (2015 - 2024)

Company Filing History:


Years Active: 2015-2026

Loading Chart...
Areas of Expertise:
Memory Array
Inter-Die Signals
Clocking Mechanism
Error Correction
Command Delay
Self-Refresh Current
Input Signal Management
Parity Error
Timing Violations
Memory Devices
Calibration Input
3D Stacked Memory
45 patents (USPTO):Explore Patents

Title: Innovations by Vijayakrishna J. Vankayala: A Pioneer in Memory Device Technology

Introduction

Vijayakrishna J. Vankayala, based in Allen, TX, is a prolific inventor with a remarkable portfolio of 37 patents to his name. His contributions primarily focus on advancements in memory device technology, showcasing his commitment to enhancing data storage efficiency and reliability.

Latest Patents

Vankayala's latest patents reflect significant innovation in memory devices. One notable invention is the "Divided Clock Transmission in a Three-Dimensional Stacked Memory Device." This patent describes a memory device comprising a substrate with multiple memory die stacked in a three-dimensional configuration. The device is designed to receive clock and command signals from a host, ensuring synchronized operations across the stacked components. Each die is equipped with local control circuitry that processes a divided clock derived from the host's main clock.

Another recent patent he holds involves "Separate Inter-Die Connectors for Data and Error Correction Information." This invention outlines an apparatus that includes a master die and a target die, connected by inter-die data and error correction connectors. These innovative connectors facilitate the transfer of write data and error correction information between the dies, improving data integrity and operational efficiency. The target die houses error correction circuitry that can generate new error correction information based on the received data.

Career Highlights

Vankayala has held prominent positions in several technology-driven organizations. He has contributed his expertise to Micron Technology Incorporated, a leader in memory and storage solutions, where his work has had a substantial impact on the development of advanced memory technology. Additionally, he has worked with Lodestar Licensing Group LLC, where he played a key role in managing patent strategies and licensing initiatives.

Collaborations

Throughout his career, Vankayala has collaborated with esteemed colleagues, including Jason M. Brown and William Chad Waldrop. These collaborations have fostered an environment of innovation, allowing them to tackle complex challenges in memory technology jointly.

Conclusion

Vijayakrishna J. Vankayala's contributions to the field of memory devices exemplify his dedication to innovation and excellence. With 37 patents and a dynamic career, he continues to push the boundaries of what is possible in data storage technology. His work not only enhances the performance of memory devices but also paves the way for future advancements in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…