Taichung, Taiwan

Tsung-Xin Chien

This inventor holds 1 USPTO granted patent. Top assignee: Siliconware Precision Industries, Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tsung-Xin Chien. Retrieved from https://idiyas.com/inventor/tsung-xin-chien

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Tsung-Xin Chien and Electronic Package Innovation.

Introduction

Tsung-Xin Chien is an inventor associated with Taichung, Taiwan, and Siliconware Precision Industries, Ltd. His work includes an invention addressing electronic package design and manufacturing.

Latest Patents

Chien is credited with 1 patent: “Electronic Package and Manufacturing Method Thereof.” The invention describes an electronic component and conductors placed on a substrate structure and covered by an encapsulation layer. A conductive layer is formed along the encapsulation layer’s sides and contacts the conductors, which are bonding wires used in a wire-bonding process. By using these conductors in place of a conventional heat sink, the design can reduce the area occupied on the substrate structure.

Career Highlights

Chien’s listed patent reflects work on electronic packaging, particularly the integration of bonding wires and conductive layers to support a more space-efficient package structure. He is associated with Siliconware Precision Industries, Ltd.

Collaborations

The provided information identifies Yen-Yu Chu and Tsung-Yu Huang as Chien’s coworkers. It does not specify whether they collaborated with him on this patent.

Conclusion

Tsung-Xin Chien’s patent presents an electronic packaging approach that uses conductors and a side-mounted conductive layer to reduce substrate area while supporting the package structure.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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