Singapore, Singapore

Tsun-Lung Alex Cheng

This inventor holds 2 USPTO granted patents. Top assignees: Chartered Semiconductor Manufacturing Ltd (Corporation), Institute of Microelectronics. Active years: 2001-2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tsun-Lung Alex Cheng. Retrieved from https://idiyas.com/inventor/tsun-lung-alex-cheng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.4

ph-index = 2

Forward Citations = 32(Granted Patents)


Company Filing History:


Years Active: 2001-2002

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2 patents (USPTO):Explore Patents

Title: Tsun-Lung Alex Cheng: Innovator in Dual Damascene Technology

Introduction

Tsun-Lung Alex Cheng is a notable inventor based in Singapore, recognized for his contributions to semiconductor manufacturing. He holds 2 patents that focus on advanced methods for creating dual damascene structures, which are essential in the fabrication of integrated circuits.

Latest Patents

Cheng's latest patents include innovative techniques that enhance the efficiency of dual damascene patterning. The first patent, titled "One step dual damascene patterning by gray tone mask," introduces a method that utilizes a gray tone mask to form dual damascene trenches in a single masking and etch step. This technology allows for a photoresist patterning process, enabling the transfer of the photoresist profile into the underlying substrate through an etch process. By aligning the photoresist profile with the dual damascene structure, a precise dual damascene profile can be created on the substrate's surface.

The second patent, "Tri-layer resist method for dual damascene process," outlines a two-embodiment approach. The first embodiment involves depositing a three-layer composite layer of insulation, followed by trench etching and a hard bake. The via etch completes the dual damascene profile formation, which is then transferred into the underlying substrate. The second embodiment describes a two-layer composite layer of insulation deposited over a semiconductor surface, where trench etching and positive photoresist deposition are performed before the via etch. The removal of the patterned photoresist layers finalizes the dual damascene structure.

Career Highlights

Cheng has worked with prominent organizations in the semiconductor industry, including Chartered Semiconductor Manufacturing Ltd and the Institute of Microelectronics. His experience in these companies has significantly contributed to his expertise in semiconductor technologies.

Collaborations

Cheng has collaborated with notable colleagues such as Marokkey Raphael Sajan and Zhu Sui Hua, further enhancing his work in the field of semiconductor manufacturing.

Conclusion

Tsun-Lung Alex Cheng's innovative patents and career in semiconductor technology highlight his significant contributions to the industry. His work continues to influence advancements in dual damascene processes, showcasing the importance of innovation in modern electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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