Tainan, Taiwan

Tse-Pu Chen

This inventor holds 1 USPTO granted patent and 4 published patent applications. Top assignee: United Microelectronics Corp.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tse-Pu Chen. Retrieved from https://idiyas.com/inventor/tse-pu-chen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Tse-Pu Chen: Semiconductor Invention and Patent Profile.

Introduction

Tse-Pu Chen is an inventor associated with Tainan, Taiwan. His patent work includes a semiconductor device designed to shield an inductor.

Latest Patents

Chen is credited with 1 patent. His patent, “Semiconductor device,” describes a substrate containing a shielding structure beneath an inductor. The shielding structure has conductive filling layers placed in recesses in the substrate, with high-k dielectric liner layers between the conductive layers and the substrate. The conductive filling layers are electrically connected and grounded, forming a shield beneath the inductor.

Career Highlights

Chen is associated with United Microelectronics Corporation. His patented work addresses semiconductor-device design, particularly the integration of a grounded shielding structure with an inductor.

Collaborations

Chen’s listed coworkers include Ming-Yang Peng and Sheng-Huei Dai.

Conclusion

Tse-Pu Chen’s patent reflects a focused contribution to semiconductor design through a grounded shielding structure intended for use beneath an inductor.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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