Elk Grove, CA, United States of America

Tri Tran

This inventor holds 1 USPTO granted patent. Top assignee: Intel Ndtm US LLC. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tri Tran. Retrieved from https://idiyas.com/inventor/tri-tran-ikj9tij3

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Tri Tran, Inventor in Elk Grove, California.

Introduction

Tri Tran is an inventor based in Elk Grove, California. His patent work includes an invention related to duty cycle correction in NAND memory write paths.

Latest Patents

Tran is associated with 1 patent: “NAND Duty Cycle Correction for Data Input Write Path.” The patent describes an apparatus with NAND memory and coupled circuitry that provides duty cycle correction for one or more NAND memory write paths.

Career Highlights

Tran is associated with Intel NDTM US LLC. His patent reflects work on circuitry designed to support data input and write operations in NAND memory.

Collaborations

His listed coworkers include Sriram Balasubrahmanyam and Jong Tai Park.

Conclusion

Tri Tran’s patent work focuses on duty cycle correction for NAND memory write paths, connecting his invention to memory circuitry and data input operations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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