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For the Inventor, By the Inventor

Paradise Valley, AZ, United States of America

Tracy Garrett Drysdale

This inventor holds 14 USPTO granted patents and 3 published patent applications and 6 EPO patents. Top assignee: Intel Corporation. Active years: 2005-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tracy Garrett Drysdale. Retrieved from https://idiyas.com/inventor/tracy-garrett-drysdale

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 14 

% Patents Active = 57.1

 

Average Co-Inventor Count = 4.1

ph-index = 5

Forward Citations = 164(Granted Patents)


Location History:

  • Chandler, AZ (US) (2005 - 2007)
  • Paradise Valley, AZ (US) (2016 - 2023)

Company Filing History:

goldMedal14 out of 56,322 
 
Intel Corporation
 patents

Years Active: 2005-2026

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14 patents (USPTO):Explore Patents
1. 12748618 - Systems, methods, and apparatuses for heterogeneous computing (2026-09-29),
2. 12135981 - Systems, methods, and apparatuses for heterogeneous computing (2024-11-05),
3. 11693691 - Systems, methods, and apparatuses for heterogeneous computing (2023-07-04),
4. 11416281 - Systems, methods, and apparatuses for heterogeneous computing (2022-08-16),
5. 11093277 - Systems, methods, and apparatuses for heterogeneous computing (2021-08-17),
6. 10671392 - Systems, apparatuses, and methods for performing delta decoding on packed data elements (2020-06-02),
7. 10310897 - Hardware accelerators and methods for offload operations (2019-06-04),
8. 10169073 - Hardware accelerators and methods for stateful compression and decompression operations (2019-01-01),
9. 10037209 - Systems, apparatuses, and methods for performing delta decoding on packed data elements (2018-07-31),
10. 9965282 - Systems, apparatuses, and methods for performing delta encoding on packed data elements (2018-05-08),
11. 9557998 - Systems, apparatuses, and methods for performing delta decoding on packed data elements (2017-01-31),
12. 9465612 - Systems, apparatuses, and methods for performing delta encoding on packed data elements (2016-10-11),
13. 7168010 - Various methods and apparatuses to track failing memory locations to enable implementations for invalidating repeatedly failing memory locations (2007-01-23),
14. 6976155 - Method and apparatus for communicating between processing entities in a multi-processor (2005-12-13),

Title: Innovations by Tracy Garrett Drysdale

Introduction

Tracy Garrett Drysdale is a notable inventor based in Paradise Valley, AZ (US). He has made significant contributions to the field of heterogeneous computing, holding a total of 14 patents. His work focuses on developing systems and methods that enhance the efficiency of processing elements.

Latest Patents

Among his latest patents, Drysdale has developed systems, methods, and apparatuses for heterogeneous computing. These embodiments describe a hardware heterogeneous scheduler that dispatches instructions for execution on a plurality of heterogeneous processing elements. The instructions correspond to a code fragment that needs processing, ensuring that they are native instructions to at least one of the processing elements involved.

Career Highlights

Drysdale is currently employed at Intel Corporation, where he continues to innovate and push the boundaries of technology. His work has been instrumental in advancing the capabilities of computing systems, particularly in heterogeneous environments.

Collaborations

Throughout his career, Drysdale has collaborated with talented individuals such as Elmoustapha Ould-Ahmed-Vall and Thomas Willhalm. These collaborations have contributed to the development of cutting-edge technologies in the field.

Conclusion

Tracy Garrett Drysdale's contributions to heterogeneous computing exemplify the spirit of innovation. His patents and work at Intel Corporation highlight his commitment to advancing technology and improving processing efficiency.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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