Tokyo, Japan

Toshiya Sato

This inventor holds 17 USPTO granted patents and 1 EPO patent, primarily in Semiconductor Memory. Top assignees: Nec Corporation, Takasago International Corporation, Ando Electric Company. Active years: 1993-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Toshiya Sato. Retrieved from https://idiyas.com/inventor/toshiya-sato-yel1k4c5

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 94.1

 

Average Co-Inventor Count = 1.5

ph-index = 7

Forward Citations = 164(Granted Patents)


Location History:

  • US (1994)
  • Katsuta, JP (1995)
  • Tokyo, JP (1993 - 1999)
  • Kawasaki, JP (1995 - 2010)
  • Musashino, JP (2023)

Company Filing History:


Years Active: 1993-2023

Loading Chart...
Loading Chart...
Areas of Expertise:
Semiconductor Device
Nonvolatile Memory
Data Erasing
Flash EEPROM
Classification Apparatus
Test Mode Circuit
Data Logging
Combinatorial Optimization
Pattern Testing
Optical Pulse Tester
Acne Treatment
Acaricidal Composition
17 patents (USPTO):Explore Patents

Title: Toshiya Sato: Innovator in Combinatorial Optimization and Semiconductor Technology

Introduction

Toshiya Sato is a prominent inventor based in Tokyo, Japan, known for his significant contributions to the fields of combinatorial optimization and semiconductor technology. With a total of 17 patents to his name, Sato has developed innovative solutions that address complex problems in these areas.

Latest Patents

One of Sato's latest patents is a combinatorial optimization problem processor and method. This device is designed to associate a combinatorial optimization problem with an Ising model, facilitating the processing of such problems. The device includes a 1×2 Mach-Zehnder optical modulator that receives a polarized clock pulse train, an optical interference circuit, and a modulation signal generator that shapes the waveform of an electrical signal. This invention aims to optimize interactions between elements in a systematic manner.

Another notable patent is the classification apparatus for semiconductor substrates, which includes a bow measuring section that measures the bows of silicon substrates. This apparatus also features a bow judging section that compares measurement results against pre-set standard values to classify the substrates accordingly. The sorting section then groups the silicon substrates based on these judgments, enhancing the efficiency of semiconductor manufacturing processes.

Career Highlights

Throughout his career, Toshiya Sato has worked with notable companies such as NEC Corporation and Takasago International Corporation. His experience in these organizations has allowed him to refine his skills and contribute to groundbreaking technologies in his field.

Collaborations

Sato has collaborated with esteemed colleagues, including Kenya Ishida and Hamako Hata. These partnerships have fostered an environment of innovation and have led to the development of several impactful technologies.

Conclusion

Toshiya Sato's work in combinatorial optimization and semiconductor technology showcases his dedication to innovation and problem-solving. His patents reflect a deep understanding of complex systems and a commitment to advancing technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…