This inventor holds 3 USPTO granted patents and 1 published patent application. Top assignee: Nvidia Corporation. Active years: 2025-2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2025-2026
Title: Innovations of Tian Yang in VLSI Placement Optimization
Introduction
Tian Yang is an accomplished inventor based in Austin, TX, known for his significant contributions to the field of VLSI (Very Large Scale Integration) design. With a focus on optimizing placement strategies, he has developed innovative solutions that enhance power, performance, and area (PPA) metrics in electronic design automation.
Latest Patents
Tian Yang holds a patent for "VLSI placement optimization using self-supervised graph clustering." This patent describes a framework that receives a cell connectivity representation and cell characteristics, utilizing self-supervised graph clustering to optimize cell cluster assignments. The framework provides cell clustering constraints as placement guidance to commercial placers. By employing graph learning techniques, the PPA metrics are formulated as machine learning loss functions that can be minimized directly through gradient descent. This innovative approach improves PPA metrics at the placement stage, with enhancements that persist into the post-route stage.
Career Highlights
Tian Yang is currently employed at Nvidia Corporation, a leading technology company known for its advancements in graphics processing and AI. His work at Nvidia focuses on developing cutting-edge solutions that push the boundaries of VLSI design and optimization.
Collaborations
Tian has collaborated with talented coworkers, including Yi-Chen Lu and Haoxing Ren, who contribute to the innovative projects at Nvidia Corporation.
Conclusion
Tian Yang's work in VLSI placement optimization showcases his expertise and commitment to advancing technology in the semiconductor industry. His innovative patent reflects a significant step forward in optimizing electronic design processes.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
