Vlsi placement optimization using self-supervised graph clustering

Abstract

A VLSI placement optimization framework receives a cell connectivity representation and cell characteristics and uses self-supervised graph clustering to optimize cell cluster assignments for power, performance, and area (PPA). The framework provides cell clustering constraints as placement guidance to commercial placers. Specifically, graph learning techniques are used to formulate the PPA metrics as machine learning loss functions that can be minimized directly through gradient descent. The framework improves the PPA metrics at the placement stage and the improvements endure to the post-route stage.