Albany, CA, United States of America

Thomas George

This inventor holds 2 USPTO granted patents. Top assignees: Intel Corporation, National Semiconductor Corporation. Active years: 1988-1993.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Thomas George. Retrieved from https://idiyas.com/inventor/thomas-george-mbanya1l

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.9

ph-index = 2

Forward Citations = 167(Granted Patents)


Company Filing History:


Years Active: 1988-1993

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2 patents (USPTO):Explore Patents

Title: Thomas George: Innovator in Semiconductor Technology

Introduction

Thomas George is a notable inventor based in Albany, California, recognized for his contributions to semiconductor technology. He holds 2 patents that showcase his innovative approaches in the field. His work has significantly impacted the development of semiconductor devices, particularly in the areas of gallium arsenide deposition and bonding pad interconnection structures.

Latest Patents

One of Thomas George's latest patents is a masking technique for depositing gallium arsenide on silicon. This process involves forming GaAs on a silicon substrate while minimizing unintended silicon doping. The method begins with the growth or deposition of a dielectric layer of silicon dioxide, silicon nitride, or both on the substrate. A window is then opened in the dielectric layer to expose the silicon substrate in the regions where GaAs is to be formed. The GaAs layer is subsequently formed using conventional techniques, with the dielectric layer inhibiting the gas phase transfer of silicon contamination.

Another significant patent is the bonding pad interconnection structure. This innovation involves semiconductor devices with bonding pads formed over active regions. Protective layers are provided between the bonding pad and the underlying active regions. The first protective layer is made from a polyimide material that absorbs shock during tape automated bonding. The second layer is a puncture-resistant material, such as plasma nitride, which prevents penetration of the bonding pad due to downward force. This design ensures that the bonding pad and the active region are separated by protective layers, enhancing the reliability of the device.

Career Highlights

Throughout his career, Thomas George has worked with prominent companies in the semiconductor industry, including National Semiconductor Corporation and Intel Corporation. His experience in these organizations has allowed him to develop and refine his innovative techniques, contributing to advancements in semiconductor technology.

Collaborations

Thomas has collaborated with notable professionals in the field, including Hem P Takiar and Albert T Wu. These collaborations have further enriched his work and have led to significant advancements in semiconductor device design and manufacturing.

Conclusion

Thomas George is a distinguished inventor whose work in semiconductor technology has led to important innovations. His patents reflect a deep understanding of the complexities involved in semiconductor manufacturing, and his contributions continue to influence the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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