The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 26, 1993
Filed:
Jun. 16, 1989
Albert T Wu, San Jose, CA (US);
Shinji Nozaki, Tokyo, JP;
Thomas George, Albany, CA (US);
Sandra S Lee, Los Altos, CA (US);
Masayoshi Umeno, Nagoya, JP;
Intel Corporation, Santa Clara, CA (US);
Abstract
A process for forming GaAs on a silicon substrate with very low levels of unintended silicon doping. First, a dielectric layer of silicon dioxide, silicon nitride, or both is grown or deposited on the substrate. Next, a window is opened in the dielectric layer exposing the silicon substrate in the regions in which the GaAs is to be formed. The GaAs layer is then formed on the substrate using conventional techniques with the gas phase transfer of silicon contamination from the edges and back of the silicon substrate to the GaAs region inhibited by the dielectric layer or layers.