Mosier, OR, United States of America

Thaddeus Clay Mccracken

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Thaddeus Clay Mccracken. Retrieved from https://idiyas.com/inventor/thaddeus-clay-mccracken-jiyv4hde

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Thaddeus Clay Mccracken and Incremental RTL Synthesis

Introduction

Thaddeus Clay Mccracken is an inventor associated with Mosier, Oregon, and Cadence Design Systems, Inc. His patent work concerns electronic design automation and methods for efficiently implementing changes to register-transfer-level (RTL) circuit designs.

Latest Patents

Mccracken is credited with 1 patent: “Incremental Synthesis from RTL Circuit Designs in EDA.” The invention describes a method for incrementally synthesizing a changed RTL design. It identifies reusable design entities from an implementation of a previous design, synthesizes logic for the current design, and combines the new logic with reusable entities according to reuse information. This approach is intended to avoid repeating synthesis work for portions of a design that remain unchanged.

Career Highlights

Mccracken’s listed invention addresses a practical challenge in electronic design automation: updating a circuit implementation when its RTL description changes. By supporting reuse of suitable design entities, the method provides a way to streamline the synthesis process.

Collaborations

Mccracken’s listed coworker is Yifeng Wang. Their association reflects collaborative work connected with the patent on incremental RTL synthesis.

Conclusion

Thaddeus Clay Mccracken’s patent documents an approach to making RTL design updates more efficient by combining reusable implementation elements with newly synthesized logic.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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