Hsinchu, Taiwan

Te-Yu Chen

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Te-Yu Chen. Retrieved from https://idiyas.com/inventor/te-yu-chen-s75tb8t4

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Te-Yu Chen and Semiconductor Isolation Technology.

Introduction.

Te-Yu Chen is associated with Hsinchu, Taiwan, and Taiwan Semiconductor Manufacturing Co., Ltd. Chen’s patent work addresses semiconductor device fabrication, particularly transistor structures and isolation techniques.

Latest Patents.

Chen is named on one patent, “Field Effect Transistor with Isolation Structure and Related Method.” The disclosed method forms adjacent stacks of semiconductor channels and sacrificial gates, along with a wider bar structure over the transition region between the stacks. After forming source/drain regions and replacing the sacrificial gates with channel-wrapping gate structures, the method replaces the bar structure with an inactive gate structure and then with an isolation structure. The approach describes a fabrication sequence for integrating isolation into a field-effect transistor architecture.

Chen’s listed portfolio includes 1 patent.

Career Highlights.

Chen’s identified patent reflects work in semiconductor manufacturing and transistor integration. The available information associates Chen with Taiwan Semiconductor Manufacturing Co., Ltd., a company based in Taiwan.

Collaborations.

The patent information also names Shih-Chi Fu and Chih-Hsiung Peng as coworkers. Their inclusion indicates a connection to the broader technical team associated with the disclosed invention.

Conclusion.

Te-Yu Chen’s patent focuses on a process for forming an isolation structure alongside semiconductor channels and gate structures, highlighting a contribution to transistor fabrication technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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