Nonoichi, Japan

Tatsuya Nishiwaki

This inventor holds 50 USPTO granted patents and 19 published patent applications, primarily in Semiconductor Devices. Top assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation. Active years: 2013-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tatsuya Nishiwaki. Retrieved from https://idiyas.com/inventor/tatsuya-nishiwaki

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 50 

% Patents Active = 94.0

Average Co-Inventor Count = 2.4

ph-index = 4

Forward Citations = 81(Granted Patents)


Location History:

  • Kanagawa-ken, JP (2013 - 2014)
  • Kanagawa, JP (2014)
  • Himeji, JP (2014)
  • Hyogo-ken, JP (2016)
  • Ishikawa, JP (2018 - 2019)
  • Komatsu Ishikawa, JP (2017 - 2023)
  • Nonoichi Ishikawa, JP (2017 - 2023)
  • Nonoichi, JP (2021 - 2023)
  • Komatsu, JP (2021 - 2024)
  • Yokohama, JP (2024)

Company Filing History:


Years Active: 2013-2026

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Areas of Expertise:
Semiconductor Device
Field Plate Electrode
Control Circuit
Conductive Parts
Varying Thickness
On-Resistance
Electric Field Crowding
Manufacturing Method
Region of Varying Thickness
Reduced On-Resistance
Crowding Reduction
50 patents (USPTO):Explore Patents

Title: Innovations in Semiconductor Devices by Tatsuya Nishiwaki

Introduction

Tatsuya Nishiwaki, an inventive mind from Nonoichi Ishikawa, Japan, has made significant contributions to the field of semiconductor devices with an impressive portfolio of 40 patents. His expertise in this domain has led to advancements that enhance the performance and efficiency of semiconductor technologies.

Latest Patents

Nishiwaki's recent patents showcase innovative designs in semiconductor devices. One embodiment details a semiconductor device that comprises a first electrode, a first semiconductor region of a first conductivity type, and a variety of other essential components, including electrodes and semiconductor regions of different conductivity types. This invention emphasizes the configuration of electrodes and semiconductor regions to optimize performance, particularly highlighting the arrangement of the second electrode in relation to the first semiconductor region, which is separated by an insulating layer.

Another notable patent describes a semiconductor device that involves a combination of electrodes, conductive members, and insulating members. This device features a unique arrangement wherein the conductive member establishes electrical connections with the second or third electrode, improving efficiency and reliability. Such configurations illustrate Nishiwaki's innovative approach to semiconductor design, bringing forth enhanced functionality in electronic devices.

Career Highlights

Throughout his career, Tatsuya Nishiwaki has worked with prominent companies such as Kabushiki Kaisha Toshiba and Toshiba Electronic Devices & Storage Corporation. His tenure at these organizations has facilitated the development of his groundbreaking inventions, driving advancements in semiconductor technology.

Collaborations

Nishiwaki has collaborated with notable associates, including Hiroaki Katou and Kohei Oasa. Their collective expertise and teamwork have undoubtedly contributed to the innovative developments emerging from their projects, reinforcing the importance of collaboration in the field of technology and patents.

Conclusion

Tatsuya Nishiwaki's prolific patent portfolio reflects his commitment to innovation in semiconductor devices. His work not only highlights his individual talent but also underscores the collaborative efforts that amplify technological advancements. Through his contributions, Nishiwaki continues to inspire future inventors and engineers striving to push the boundaries of innovation in the semiconductor industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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