Shiojiri, Japan

Tatsuya Karasawa

This inventor holds 5 USPTO granted patents and 1 published patent application. Top assignee: Fuji Electric Co., Ltd.. Active years: 2015-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tatsuya Karasawa. Retrieved from https://idiyas.com/inventor/tatsuya-karasawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5 

% Patents Active = 100.0

Average Co-Inventor Count = 1.4

ph-index = 1

Forward Citations = 6(Granted Patents)


Location History:

  • Nagano, JP (2015)
  • Shiojiri, JP (2015 - 2021)

Company Filing History:


Years Active: 2015-2021

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5 patents (USPTO):Explore Patents

Title: Tatsuya Karasawa - Innovator in Semiconductor Technology

Introduction

Tatsuya Karasawa is an inventor based in Shiojiri-city, Japan. He is known for his contributions to semiconductor technology, particularly in the development of innovative manufacturing methods. Although he currently holds no granted patents, his work in the field is noteworthy.

Latest Patent Applications

Tatsuya Karasawa's latest patent application is titled "SEMICONDUCTOR MODULE AND MANUFACTURING METHOD THEREFOR." This application describes a method that includes electrically connecting first and second semiconductor elements to conductive plates on the front surface of insulating substrates disposed on a metal base. The method also involves the assembly of a case that includes a chassis and lead frames, which are integrally molded together. Additionally, it details the attachment of insulating members that secure the wiring parts in place, ensuring effective functionality before joining the lead frames to circuit patterns.

Conclusion

Tatsuya Karasawa's innovative approach to semiconductor manufacturing highlights his potential impact on the industry. His ongoing work may lead to significant advancements in technology in the future.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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