Hiratsuka, Japan

Tatsuhiko Katayama

This inventor holds 3 USPTO granted patents. Top assignees: Komatsu Electronic Metals Co., Ltd., Nippon Telegraph and Telephone Corporation, Ntt Electronics Technology Corporation. Active years: 1997-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tatsuhiko Katayama. Retrieved from https://idiyas.com/inventor/tatsuhiko-katayama

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 3

Forward Citations = 45(Granted Patents)


Company Filing History:


Years Active: 1997-1999

Loading Chart...
3 patents (USPTO):Explore Patents

Title: Innovations of Tatsuhiko Katayama

Introduction

Tatsuhiko Katayama is a notable inventor based in Hiratsuka, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 3 patents. His work primarily focuses on methods for producing silicon-on-insulator (SOI) substrates and semiconductor devices.

Latest Patents

One of his latest patents is titled "SOI substrate and method of producing the same." This patent describes a method for creating an SOI substrate that features a single-crystal silicon layer on a buried oxide layer. The process involves implanting oxygen ions into a single crystal silicon substrate and conducting anneal processing in an inert gas atmosphere at high temperatures. This results in the formation of the buried oxide layer. Following this, oxidation processing is performed in a high-temperature oxygen atmosphere to achieve the desired thickness of the buried oxide layer.

Another significant patent is the "Method of making semiconductor device having SIMOX structure." This patent outlines a process where a SIMOX substrate undergoes high-temperature oxidation treatment after a mask-pattern is applied to shield specific electrodes from oxidation. This technique enhances the thickness of the buffed oxide layer, allowing for the production of MOSFETs with controlled characteristics. The method effectively reduces the negative effects of parasitic capacitance and enables the formation of multiple devices with varying breakdown voltages on the same substrate.

Career Highlights

Throughout his career, Tatsuhiko Katayama has worked with prominent companies such as Komatsu Electronic Metals Co., Ltd. and Nippon Telegraph and Telephone Corporation. His experience in these organizations has contributed to his expertise in semiconductor technology and innovation.

Collaborations

Tatsuhiko has collaborated with notable colleagues, including Katsutoshi Izumi and Sadao Nakashima. These partnerships have likely fostered a creative environment that has led to advancements in their respective fields.

Conclusion

Tatsuhiko Katayama's contributions to semiconductor technology through his innovative patents and collaborations highlight his importance as an inventor. His work continues to influence the development of advanced semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…