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Patparganj, India

Tara Vishin

USPTO Granted Patents = 3

Average Co-Inventor Count = 2.4

ph-index = 2

Forward Citations = 14(Granted Patents)

Location History:

Patparganj, IN (2017 - 2018)
Delhi, IN (2018)

Company Filing History:

Cadence Design Systems, Inc.

Years Active: 2017-2018

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3 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10164524 - Methods and devices for charge pump level translation in high-speed memory drivers (2018-12-25),

2. 9997214 - LevelShifter-less output buffer with hybrid driver for high speed and low supply memory applications (2018-06-12),

3. 9754646 - Voltage stress tolerant high speed memory driver having flying capacitor circuit (2017-09-05),

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