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For the Inventor, By the Inventor

Fujisawa, Japan

Takeshi Sugahara

This inventor holds 9 USPTO granted patents. Top assignee: Kabushiki Kaisha Toshiba. Active years: 2005-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takeshi Sugahara. Retrieved from https://idiyas.com/inventor/takeshi-sugahara

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 9

Average Co-Inventor Count = 1.7

ph-index = 4

Forward Citations = 33(Granted Patents)


Location History:

  • Kanagawa, JP (2005)
  • Fujisawa, JP (2006 - 2011)

Company Filing History:

goldMedal9 out of 53,262 
 
Kabushiki Kaisha Toshiba
 patents

Years Active: 2005-2011

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9 patents (USPTO):Explore Patents
1. 7933107 - Electrostatic discharge protection circuit device (2011-04-26),
2. 7882476 - Semiconductor integrated circuit device formed by automatic layout wiring by use of standard cells and design method of fixing its well potential (2011-02-01),
3. 7514728 - Semiconductor integrated circuit device using four-terminal transistors (2009-04-07),
4. 7368767 - Semiconductor integrated circuit device formed by automatic layout wiring by use of standard cells and design method of fixing its well potential (2008-05-06),
5. 7365377 - Semiconductor integrated circuit device using four-terminal transistors (2008-04-29),
6. 7304884 - Semiconductor memory device (2007-12-04),
7. 7120076 - Semiconductor memory device (2006-10-10),
8. 7116574 - Semiconductor memory device (2006-10-03),
9. 6876560 - Content addressable memory and memory system (2005-04-05),

Title: The Innovations of Takeshi Sugahara

Introduction

Takeshi Sugahara is a prominent inventor based in Fujisawa, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 9 patents. His work focuses on enhancing the reliability and efficiency of electronic devices.

Latest Patents

One of Sugahara's latest patents is an electrostatic discharge protection circuit device. This device includes a discharge circuit, a trigger circuit, and a trigger control circuit. The discharge circuit is connected to a predetermined circuit node of a semiconductor device and activates when surge voltage is applied. The trigger circuit initiates the discharge operation, while the trigger control circuit regulates the trigger voltage necessary for the operation. Another notable patent is related to a semiconductor integrated circuit device formed by automatic layout wiring using standard cells. This invention addresses the issue of substrate potential changes by estimating the impact of various factors, ensuring that the circuit remains within reference values for optimal performance.

Career Highlights

Takeshi Sugahara is currently employed at Kabushiki Kaisha Toshiba, where he continues to innovate in the semiconductor field. His work has been instrumental in developing advanced technologies that improve electronic device performance.

Collaborations

Sugahara has collaborated with notable colleagues, including Yasuhito Itaka and Yukihiro Fujimoto. Their combined expertise has contributed to the success of various projects and patents.

Conclusion

Takeshi Sugahara's contributions to semiconductor technology through his patents and collaborations highlight his role as a leading inventor in the field. His innovative solutions continue to shape the future of electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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