The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 2011
Filed:
Sep. 15, 2005
Yasuhito Itaka, Yokohama, JP;
Koichi Kinoshita, Yokohama, JP;
Takeshi Sugahara, Fujisawa, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
Standard cells without a well potential fixing active region (T-toT-T-toT-T-toT-T-toT-) are read from a library and a circuit is temporarily designed by automatic layout wiring. Then, a change in the substrate potential is estimated from at least one of the number of transistors to be switched at the same timing in the temporarily designed circuit, the sizes of transistors, the transition probability, and the appearance probability. It is determined whether the estimated change in the substrate potential is within a reference value. If the estimated change in the substrate potential has exceeded the reference value, standard cells with a well potential fixing active region (T-T-T-andT-) are read from the library and placed in a region where the estimated change in the substrate potential exceeds the reference value. Thereafter, automatic layout wiring is done again, thereby forming a circuit.