Tokyo, Japan

Takeo Maeda

This inventor holds 26 USPTO granted patents and 1 published patent application, primarily in Semiconductor Manufacturing. Top assignee: Kabushiki Kaisha Toshiba. Active years: 1987-1997.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takeo Maeda. Retrieved from https://idiyas.com/inventor/takeo-maeda

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 26 

% Patents Active = 100.0

Average Co-Inventor Count = 1.9

ph-index = 10

Forward Citations = 286(Granted Patents)


Location History:

  • Kawasaki, JP (1988 - 1992)
  • Tokyo, JP (1987 - 1997)

Company Filing History:


Years Active: 1987-1997

Loading Chart...
Areas of Expertise:
Semiconductor Device
Bipolar Transistor
BiMOS Device
Integrated Circuit
CMOS Transistor
Isolation Region
Wiring Electrodes
Polysilicon
Hybrid LSI Circuit
Memory Cells
Double Well Structure
Gate Circuit
26 patents (USPTO):Explore Patents

Title: Innovations of Takeo Maeda: A Visionary in Semiconductor Technology

Introduction

Takeo Maeda, a prominent inventor based in Tokyo, Japan, is recognized for his significant contributions to semiconductor technology. With an impressive portfolio of 26 patents, Maeda has played a pivotal role in advancing the methodologies of semiconductor device manufacturing.

Latest Patents

Maeda's latest patents include a groundbreaking method for manufacturing a semiconductor device isolation region. This innovative technique involves forming an insulation material on the main surface of a semiconductor substrate, creating a groove that extends into the substrate. This groove is subsequently filled with a first insulation film, which serves as an etching mask for removing the material film, resulting in a precise projecting portion.

Another noteworthy patent is focused on the method of manufacturing semiconductor devices that include both bipolar and MOS transistors. This process is executed on a p-type silicon substrate, where an npn bipolar transistor and a p-channel MOS transistor are formed. The design integrates p-type impurities in the electrodes of the transistors and strategically positions layers of silicon oxide and silicon nitride, enhancing the overall efficiency of the semiconductor devices.

Career Highlights

Takeo Maeda is associated with Kabushiki Kaisha Toshiba, a leading technology company known for its contributions to the electronics and semiconductor industries. His work at Toshiba exemplifies the integration of cutting-edge technology with practical applications, further solidifying the company's reputation in innovation.

Collaborations

Throughout his career, Maeda has collaborated with esteemed colleagues such as Hiroshi Momose and Hiroshi Gojohbori. Their collective efforts have resulted in numerous advancements in semiconductor technologies, highlighting the importance of teamwork in driving innovation.

Conclusion

Takeo Maeda's dedication to the field of semiconductor technology underscores his status as a key inventor. His innovative methods and collaborations have significantly influenced the industry, marking him as a pivotal figure in ongoing technological advancements. With each patent, Maeda continues to pave the way for future innovations in the realm of semiconductor manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…