Tokyo, Japan

Takayoshi Yoshida

This inventor holds 4 USPTO granted patents. Top assignees: Nec Corporation, Oki Electric Industry Co., Ltd.. Active years: 1985-1996.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takayoshi Yoshida. Retrieved from https://idiyas.com/inventor/takayoshi-yoshida-m084jfay

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.5

ph-index = 4

Forward Citations = 87(Granted Patents)


Company Filing History:


Years Active: 1985-1996

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4 patents (USPTO):Explore Patents

Title: Takayoshi Yoshida: Innovator in Semiconductor Technology

Introduction

Takayoshi Yoshida is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 4 patents. His work focuses on advanced fabrication methods and graphic processing techniques that enhance the performance and efficiency of electronic devices.

Latest Patents

One of Yoshida's latest patents is a fabrication method of a field-effect transistor (FET). This method enables the realization of a shorter length between the source-side edge of a recess and the opposing edge of a gate electrode with higher accuracy than current lithography techniques, achieving an accuracy of about ±0.1 μm. The process involves epitaxially growing channel, carrier-supply, and contact layers on a semiconductor substrate, followed by the formation of a patterned insulator layer. This layer serves as a mask for isotropic etching of the contact layer, creating a symmetrical recess on the carrier-supply layer. The method ensures minimal etching of the underlying layer, resulting in a highly efficient fabrication process.

Another notable patent is for a scan-conversion processor designed to convert graphic primitives defined by their outlines into pixel data. This processor stores edge data blocks containing the y-coordinates of the vertices of each edge, along with the x-coordinates of the lower vertex and x-coordinate increment data. The edge blocks are linked in ascending order of their minimum y-coordinate values, forming edge chains that represent consecutive series of edges. This innovative approach allows for efficient memory usage, enabling the entire scan-conversion processor to be implemented as a single integrated circuit on a semiconductor chip.

Career Highlights

Throughout his career, Takayoshi Yoshida has worked with notable companies such as Oki Electric Industry Co., Ltd. and NEC Corporation. His experience in these organizations has contributed to his expertise in semiconductor technology and graphic processing.

Collaborations

Yoshida has collaborated with esteemed colleagues, including Ikuo Oyake and Yasunobu Nashimoto. Their combined efforts have further advanced the field of semiconductor innovations.

Conclusion

Takayoshi Yoshida's contributions to semiconductor technology and graphic processing have established him as a key figure in the industry. His innovative patents reflect his commitment to enhancing electronic device performance and efficiency.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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