Kokubunji, Japan

Takaharu Nagumo

This inventor holds 2 USPTO granted patents. Top assignee: Hitachi, Ltd.. Active years: 1993-1995.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takaharu Nagumo. Retrieved from https://idiyas.com/inventor/takaharu-nagumo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 17(Granted Patents)


Location History:

  • Kokubunji, JP (1993)
  • Hadano, JP (1995)

Company Filing History:


Years Active: 1993-1995

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2 patents (USPTO):Explore Patents

Title: Takaharu Nagumo: Innovator in Logic Circuit Technology

Introduction

Takaharu Nagumo is a notable inventor based in Kokubunji, Japan. He has made significant contributions to the field of logic circuit technology, holding 2 patents that showcase his innovative approach to logical operations and fault simulations.

Latest Patents

One of his latest patents is a "Logical operation method employing parallel arithmetic unit." This method evaluates a train of output data generated when multiple input patterns are applied to a memory element. The output value of this memory element is influenced by a sequence of input values. The method determines if each pattern is a holding pattern, meaning the output depends on a preceding pattern. It then evaluates two data trains: one consisting of flags indicating whether a pattern is a holding pattern and another containing predetermined logical values for holding patterns. By utilizing a parallel arithmetic unit, this method allows for high-speed logic and fault simulations, significantly reducing man-hours and processing time in logic verification and test data generation.

Another significant patent is the "Fault simulation method." This method modifies a logic circuit into a configuration using basic logic gates. It creates pin management data that indicates the correspondence of pins to fault assumptions. Logic simulation is performed by injecting a fault logic value into the designated pin positions, enabling effective fault detection in the modified logic circuit.

Career Highlights

Takaharu Nagumo is currently employed at Hitachi, Ltd., where he continues to develop innovative solutions in logic circuit technology. His work has been instrumental in advancing the efficiency and reliability of logic simulations.

Collaborations

He has collaborated with notable colleagues, including Hiroo Watai and Masahiko Nagai, contributing to various projects that enhance the field of logic circuit technology.

Conclusion

Takaharu Nagumo's contributions to logic circuit technology through his patents and work at Hitachi, Ltd. highlight his role as an influential inventor in the industry. His innovative methods for logical operations and fault simulations pave the way for advancements in technology and efficiency.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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