This inventor holds 3 USPTO granted patents. Top assignee: Adv Antest Corporation. Active years: 1997-2006.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Location History:
- Kazo, JP (1997)
- Gyoda, JP (2000)
- Gunma, JP (2006)
Company Filing History:
Years Active: 1997-2006
Title: Innovations by Tadashi Okazaki
Introduction
Tadashi Okazaki is a notable inventor based in Gunma, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 3 patents. His work focuses on enhancing the efficiency and reliability of memory testing systems.
Latest Patents
One of his latest inventions is a semiconductor memory testing device. This invention provides a semiconductor memory test system that avoids conducting logic comparisons for a specific memory block after a failure is detected. The system tests writing and erasing as a unit of the block in the memory under test. It includes a register for each memory under test, which holds the first failure generated in a particular block at a first control signal from a pattern generator. This system establishes a pass result for the block for test cycles after the first failure, treating any subsequent failure result for that block as a pass result. The register can be reset at a cycle specified by a second control signal from the pattern generator to release the pass result.
Another significant patent is an address generating device for a memory tester. In this device, addresses are generated by an address computation part in response to data and control signals read from an instruction memory. A command control bit is provided in the instruction memory to store a command control signal, while a command register stores a command read from a data area of the instruction memory. The outputs from the address computation part and the command register are input into a first multiplexer, which selects one of the two inputs based on a command control signal. The output from the first multiplexer is then applied to a descrambler, translating it to a physical address. A second multiplexer selects between the outputs from the descrambler and the first multiplexer, controlled by a descramble inhibit signal read from a descramble inhibit bit in the instruction memory.
Career Highlights
Tadashi Okazaki is currently employed at Adv Antest Corporation, where he continues to innovate in the field of semiconductor testing. His work has been instrumental in advancing the technology used in memory testing systems.
Collaborations
He has collaborated with notable colleagues such as Shinichi Kobayashi and Toshimi Ohsawa, contributing to various projects and innovations in the semiconductor industry.
Conclusion
Tadashi Okazaki's contributions to semiconductor technology through his patents and work at Adv
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
