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For the Inventor, By the Inventor

Sagamihara, Japan

Tadahiko Nishimukai

This inventor holds 36 USPTO granted patents, primarily in Data Processing Systems. Top assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering, Ltd., Hitachi Vlsi Engineering Corp.. Active years: 1987-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tadahiko Nishimukai. Retrieved from https://idiyas.com/inventor/tadahiko-nishimukai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 36

% Patents Active = 97.2

Average Co-Inventor Count = 3.8

ph-index = 15

Forward Citations = 539(Granted Patents)


Company Filing History:

goldMedal34 out of 42,740 
 
Hitachi, Ltd.
 patents
silverMedal15 out of 149 
 
Hitachi Microcomputer Engineering, Ltd.
 patents
bronzeMedal2 out of 182 
 
Hitachi Vlsi Engineering Corp.
 patents
4. 1 out of 836 
 
Hitachi Cable, Inc.
 patents
5. 1 out of 5 
 
Hitachi Microcomputer
 patents
6. 1 out of 9 
 
Hitachi Microcomputer Eng. Ltd.
 patents
7. 2 out of 834,570 
Other
 patents
where one patent can have more than one assignee

Years Active: 1987-2004

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Areas of Expertise:
Cache Memory Control
Data Processor
Multiprocessor System
On-Chip Cache
Pipeline Processor
Virtual Memory
RISC System
Content Addressable Memory
Clock Distribution Circuit
Single-Chip Processor
Purge Control
Semiconductor Memory
36 patents (USPTO):Explore Patents
1. 6779102 - Data processor capable of executing an instruction that makes a cache memory ineffective (2004-08-17),
2. 6381680 - Data processing system with an enhanced cache memory control (2002-04-30),
3. 6272596 - Data processor (2001-08-07),
4. 6078983 - Multiprocessor system having distinct data bus and address bus arbiters (2000-06-20),
5. 5974533 - Data processor (1999-10-26),
6. 5822761 - Data processing system which controls operation of cache memory based (1998-10-13),
7. 5809274 - Purge control for ON-chip cache memory (1998-09-15),
8. 5740401 - Multiprocessor system having a processor invalidating operand cache when (1998-04-14),
9. 5680631 - Data processor with on-chip cache memory and purge controller responsive (1997-10-21),
10. 5619677 - Data processing system with an enhanced cache memory control (1997-04-08),
11. 5509133 - Data processing system with an enhanced cache memory control (1996-04-16),
12. 5502825 - Data processing system with an enhanced cache memory control (1996-03-26),
13. 5479625 - Ring systolic array system for synchronously performing matrix/neuron (1995-12-26),
14. 5442229 - Metal lead-film carrier assembly having a plurality of film carriers, (1995-08-15),
15. 5430397 - Intra-LSI clock distribution circuit (1995-07-04),

Title: The Innovations of Tadahiko Nishimukai

Introduction

Tadahiko Nishimukai, an accomplished inventor based in Sagamihara, Japan, has made significant contributions to the field of data processing technology. With a remarkable portfolio of 36 patents, Nishimukai's work converges on enhancing the efficiency and functionality of cache memory in data processors.

Latest Patents

Among his latest innovations, Nishimukai has developed a data processor that can execute instructions to render a cache memory ineffective. This processor, formed on an LSI chip, includes an instruction address generator and a cache memory containing entries that store instruction addresses and corresponding instructions. The processor effectively decodes these instructions to facilitate efficient data processing.

Another notable invention is a data processing system featuring enhanced cache memory control. This system employs a detection circuit that determines whether a read access request generated by the central processing unit (CPU) corresponds to areas accessible by other devices. If the required data isn't found in cache memory, the system fetches it from the entire storage area, allowing for more flexible and efficient data management.

Career Highlights

Throughout his professional journey, Tadahiko Nishimukai has been associated with prominent companies, including Hitachi, Ltd. and Hitachi Microcomputer Engineering, Ltd. His experience in these organizations has been instrumental in shaping innovative technologies in data processing systems.

Collaborations

Nishimukai has collaborated with notable colleagues, including Atsushi Hasegawa and Makoto Hanawa. These collaborations have led to the development of pioneering solutions that address complex challenges in the computing world.

Conclusion

Tadahiko Nishimukai continues to push the boundaries of innovation in data processing technology. With his extensive patent portfolio and collaborative efforts, he remains a vital contributor to advancements in cache memory systems, further solidifying his legacy in the field of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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