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For the Inventor, By the Inventor

San Jose, CA, United States of America

Susumu Okamura

This inventor holds 15 USPTO granted patents and 4 published patent applications and 1 EPO patent, primarily in Spintronic Devices. Top assignee: Western Digital Technologies, Inc.. Active years: 2024-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Susumu Okamura. Retrieved from https://idiyas.com/inventor/susumu-okamura-j00mw04j

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 15 

% Patents Active = 93.3

 

Average Co-Inventor Count = 4.7

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:

goldMedal15 out of 5,433 
 
Western Digital Technologies, Inc.
 patents

Years Active: 2024-2026

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Areas of Expertise:
Heusler Alloys
Magnetoresistive Devices
Multilayer Structures
Spin Torque Oscillator
BiSb Alloys
Magnetic Heads
Tunneling Magnetoresistive
Synthetic Antiferromagnetic Coupling
Cobalt-Boron Layer
Spintronic Technology
Memory Devices
Storage Devices
15 patents (USPTO):Explore Patents
1. 12685028 - Buffer layers, interlayers, and barrier layers comprising Heusler alloys for SOT based sensor, memory, and storage devices (2026-07-14),
2. 12567438 - Magnetic heads having low magnetic coercivity (Hc) and high saturated magnetic flux density (Bs) in ferromagnetic (FM) layer(s) or shield(s) with minimized saturation (2026-03-03),
3. 12417782 - Multilayer structures for magnetic recording devices to facilitate targeted magnetic switching and low coercivity (2025-09-16),
4. 12408560 - Buffer layers and interlayers that promote BiSbx (012) alloy orientation for sot and MRAM devices (2025-09-02),
5. 12207563 - Magnetoresistive devices comprising a synthetic antiferromagnetic coupling layer of RuAl having a (110) texture (2025-01-21),
6. 12106791 - Doped BiSb (012) or undoped BiSb (001) topological insulator with GeNiFe buffer layer and/or interlayer for SOT based sensor, memory, and storage devices (2024-10-01),
7. 12106784 - Read sensor with ordered heusler alloy free layer and semiconductor barrier layer (2024-10-01),
8. 12094498 - Recording head with a multilayer spin torque element having positive and negative beta materials (2024-09-17),
9. 12040114 - Magnetoresistive device comprising a synthetic antiferromagnetic coupling layer of RuAl having a (001) texture (2024-07-16),
10. 12035634 - Tunneling magnetoresistive (TMR) device with improved seed layer (2024-07-09),
11. 12033675 - Cobalt-boron (CoB) layer for magnetic recording devices, memory devices, and storage devices (2024-07-09),
12. 11990163 - Multilayer structures for magnetic recording devices to facilitate targeted magnetic switching and low coercivity (2024-05-21),
13. 11925120 - Spintronic devices with self-cooling function (2024-03-05),
14. 11908496 - BiSbX (012) layers having increased operating temperatures for SOT and MRAM devices (2024-02-20),
15. 11881236 - Spin torque oscillator with enhanced spin polarizer (2024-01-23),

Title: The Inventor Susumu Okamura: Revolutionizing Technology in San Jose

Introduction: Susumu Okamura is a renowned inventor based in San Jose, CA, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Susumu Okamura holds several patents in the areas of semiconductor technology, artificial intelligence, and renewable energy solutions, showcasing his diverse expertise and forward-thinking approach.

Career Highlights: With a career spanning over two decades, Susumu Okamura has worked with leading tech companies in Silicon Valley, spearheading projects that have pushed the boundaries of what is possible in the tech industry.

Collaborations: Throughout his career, Susumu Okamura has collaborated with top researchers, engineers, and scientists, fostering a culture of innovation and excellence in all his projects.

Conclusion: Susumu Okamura's passion for innovation and his relentless pursuit of technological advancement continue to inspire the next generation of inventors and entrepreneurs in San Jose and beyond.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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