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For the Inventor, By the Inventor

Boise, ID, United States of America

Sujeet V Ayyapureddi

USPTO Granted Patents = 84 

Average Co-Inventor Count = 1.5

ph-index = 10

Forward Citations = 302(Granted Patents)

DiyaCoin DiyaCoin = 1.15 


Inventors with similar research interests:


Company Filing History:

goldMedal84 out of 37,905 
 
Micron Technology Incorporated
 patents

Years Active: 2006-2025

where 'Filed Patents' based on already Granted Patents

84 patents (USPTO):
1. 12488853 - Apparatuses and methods for single-pass access of ECC information, metadata information or combinations thereof (2025-12-02),
2. 12488830 - Output timing for channel loopback of a memory device (2025-12-02),
3. 12488815 - Apparatuses, systems, and methods for managing metadata storage at a memory (2025-12-02),
4. 12475965 - Apparatuses and methods for configurable ECC modes (2025-11-18),
5. 12451211 - Access line contacts for an access line in a memory device (2025-10-21),
6. 12443484 - Apparatuses and methods for variable input ECC circuits (2025-10-14),
7. 12437829 - Apparatuses, systems, and methods for storing error information and providing recommendations based on same (2025-10-07),
8. 12406717 - Apparatuses and methods for dynamically allocated aggressor detection (2025-09-02),
9. 12400728 - Apparatuses, systems, and methods for storing error information and providing recommendations based on same (2025-08-26),
10. 12400702 - Apparatuses and methods to deprioritize traffic to unavailable memory banks (2025-08-26),
11. 12399649 - Techniques for four cycle access commands (2025-08-26),
12. 12367913 - Apparatuses, systems, and methods for memory module data drivers (2025-07-22),
13. 12340858 - Apparatuses, systems, and methods for module level error correction (2025-06-24),
14. 12315553 - Selectable row hammer mitigation (2025-05-27),
15. 12292798 - Apparatuses, systems, and methods for module level error correction (2025-05-06),

Title: The Innovator Sujeet V Ayyapureddi: Enhancing Memory Devices with 48 Patents

Introduction: Sujeet V Ayyapureddi is a prolific inventor based in Boise, Idaho, known for his groundbreaking work in memory device technologies. With a total of 48 patents to his name, he has significantly contributed to the advancement of error detection and correction mechanisms in memory devices.

Latest Patents:

In his recent patents, Sujeet V Ayyapureddi focuses on enhancing memory device functionality. One of his latest innovations includes methods, systems, and devices for multiple bit error detection in scrub operations. This technology allows memory devices to correct single-bit errors and detect multiple-bit errors during scrub operations, ensuring data integrity and reliability.

Another patent of his introduces apparatuses and methods for bad row mode, where memory devices can prevent proper access operations on selected bad rows. This technology is crucial for post package repair operations and ensures the overall health and efficiency of memory systems.

Career Highlights:

Sujeet V Ayyapureddi is a valued member of Micron Technology Incorporated, where he brings his expertise to the forefront of technological innovation. His dedication to improving memory device technologies has garnered him recognition within the industry.

Collaborations:

Within Micron Technology Incorporated, Sujeet V Ayyapureddi collaborates closely with esteemed coworkers such as Donald M Morgan and Vasu Seeram. Together, they drive forward cutting-edge research and development initiatives in the field of memory devices.

Conclusion:

In conclusion, Sujeet V Ayyapureddi stands out as a pioneering inventor in the realm of memory device technologies. His numerous patents and collaborative efforts highlight his dedication to pushing the boundaries of innovation, ultimately shaping the future of memory systems.

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