Sudhir K Patel

Title: Sudhir K Patel: Innovator in Pulse Rejection Circuit Technology

Introduction

Sudhir K Patel is a notable inventor based in Fort Collins, Colorado. He has made significant contributions to the field of electronics, particularly in the development of pulse rejection circuit technology. His innovative approach has led to advancements that enhance the reliability of logic cells in digital circuits.

Latest Patents

Sudhir K Patel holds a patent for a "Pulse rejection circuit model program and technique in VHDL." This method determines the behavior of a logic cell that receives input signals resulting in a narrow pulse or 'glitch.' If the pulse width of the output pulse is narrower than a pulse rejection period, the output pulse is rejected and is not propagated to subsequent logic cells connected to the output. The method employs a first internal logic cell model assigned an inertial delay function and a second internal logic cell model assigned a transport delay function. In combination, these models result in an effective propagation delay value, subject to the pulse rejection feature. An exemplary VHDL model is disclosed, and a program product embodies a logic cell model in VHDL providing pulse rejection capabilities for output pulses with pulse width smaller than a pulse rejection period. Sudhir K Patel has 1 patent to his name.

Career Highlights

Sudhir K Patel has worked at LSI Logic Corporation, where he has been instrumental in developing advanced electronic solutions. His work has contributed to the enhancement of digital circuit performance, making him a valuable asset to his team and the industry.

Collaborations

One of his notable coworkers is Richard D Blinne, with whom he has collaborated on various projects within the company.

Conclusion

Sudhir K Patel's innovative work in pulse rejection circuit technology showcases his expertise and commitment to advancing electronic engineering. His contributions continue to impact the field positively.