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For the Inventor, By the Inventor

Poughkeepsie, NY, United States of America

Stephen P Glancy

USPTO Granted Patents = 25 

Average Co-Inventor Count = 4.0

ph-index = 4

Forward Citations = 85(Granted Patents)


Location History:

  • Poughkeepsie, NY (US) (2017 - 2020)
  • Yorktown, VA (US) (2020 - 2023)

Company Filing History:

goldMedal25 out of 164,108 
 
International Business Machines Corporation
 patents

Years Active: 2017-2023

where 'Filed Patents' based on already Granted Patents

25 patents (USPTO):
1. 11698842 - Efficient and selective sparing of bits in memory systems (2023-07-11),
2. 11593196 - Method and apparatus to reduce bandwidth overhead of CRC protection on a memory channel (2023-02-28),
3. 11200112 - Method and apparatus to reduce bandwidth overhead of CRC protection on a memory channel (2021-12-14),
4. 11182262 - Efficient and selective sparing of bits in memory systems (2021-11-23),
5. 10936222 - Hardware abstraction in software or firmware for hardware calibration (2021-03-02),
6. 10671497 - Efficient and selective sparing of bits in memory systems (2020-06-02),
7. 10606696 - Internally-generated data storage in spare memory locations (2020-03-31),
8. 10585672 - Memory device command-address-control calibration (2020-03-10),
9. 10580476 - Simulating a single data rate (SDR) mode on a dual data rate (DDR) memory controller for calibrating DDR memory coarse alignment (2020-03-03),
10. 10446255 - Reference voltage calibration in memory during runtime (2019-10-15),
11. 10289578 - Per-DRAM and per-buffer addressability shadow registers and write-back functionality (2019-05-14),
12. 10261856 - Bitwise sparing in a memory system (2019-04-16),
13. 10134455 - Efficient calibration of a data eye for memory devices (2018-11-20),
14. 10126968 - Efficient configuration of memory components (2018-11-13),
15. 10090065 - Simultaneous write, read, and command-address-control calibration of an interface within a circuit (2018-10-02),

Title: Innovations by Stephen P. Glancy: Pioneering Memory System Technologies

Introduction

Stephen P. Glancy, an accomplished inventor located in Poughkeepsie, NY, has made significant contributions to the field of memory systems, holding a remarkable 25 patents to his name. His innovative work focuses on enhancing data storage efficiency and reliability, playing a pivotal role in the development of modern memory technologies.

Latest Patents

Among his latest patents, Glancy has developed a memory system that provides efficient and selective sparing of bits. This advanced memory system is designed to store data across multiple memory devices, each equipped with several bits. The system is capable of detecting bit errors, and in response, it remaps these errors to a spare bit lane, ensuring data integrity.

Another notable patent addresses the issue of bandwidth overhead in cyclic redundancy check (CRC) protection on memory channels. This method streamlines the checking process between a host and a memory system, allowing for more efficient memory access operations. By adding CRC codes selectively and transferring data over the bus interface, the invention significantly enhances the reliability of memory access.

Career Highlights

Stephen P. Glancy has established a prominent career at the International Business Machines Corporation (IBM), where he has been instrumental in advancing memory technologies. His innovations have not only improved data storage but have also influenced the way today’s devices manage and protect sensitive information.

Collaborations

Glancy's work has been further enriched through collaborations with notable colleagues such as Warren Edward Maule and John Stanley Bialas, Jr. Their combined expertise has contributed to the development of cutting-edge technologies and solutions in the field of memory systems, showcasing the value of teamwork in driving innovation.

Conclusion

Through his 25 patents and ongoing contributions to IBM, Stephen P. Glancy continues to shape the landscape of memory technologies. His innovative approaches to data storage and integrity highlight the importance of advancing memory systems in our increasingly digital world, ensuring that technology remains reliable and efficient for all users.

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