Beijing, China

Siriguleng Zhang

This inventor holds 2 USPTO granted patents and 2 published patent applications. Top assignees: Semiconductor Manufacturing International (Beijing) Corporation, Semiconductor Manufacturing International (Shanghai) Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Siriguleng Zhang. Retrieved from https://idiyas.com/inventor/siriguleng-zhang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

Loading Chart...
2 patents (USPTO):Explore Patents

Title: Siriguleng Zhang: Innovator in Semiconductor Technology

Introduction

Siriguleng Zhang is a prominent inventor based in Beijing, China. He has made significant contributions to the field of semiconductor technology. His innovative methods have paved the way for advancements in semiconductor structures.

Latest Patents

Siriguleng Zhang holds a patent for a "Method for forming semiconductor structure." This method involves several steps, including providing a first substrate with specific ion concentrations, forming multiple epitaxial layers, and thinning the substrate to expose the surface of the second epitaxial layer. This patent showcases his expertise in semiconductor fabrication and design.

Career Highlights

Throughout his career, Zhang has worked with notable companies in the semiconductor industry. He has been associated with Semiconductor Manufacturing International Corporation in both Beijing and Shanghai. His experience in these leading firms has contributed to his knowledge and skills in semiconductor technology.

Collaborations

(Section skipped due to space constraints.)

Conclusion

Siriguleng Zhang's contributions to semiconductor technology through his innovative methods and patents highlight his role as a key figure in the industry. His work continues to influence advancements in semiconductor structures.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…